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SH7080 Datasheet, PDF (748/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family | |||
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Section 13 Port Output Enable (POE)
Initial
Bit Bit Name value R/W Description
14
POE6F
0
R/(W)*1 POE6 Flag
This flag indicates that a high impedance request has
been input to the POE6 pin.
[Clearing conditions]
⢠By writing 0 to POE6F after reading POE6F = 1
(when the falling edge is selected by bits 5 and 4 in
ICSR2)
⢠By writing 0 to POE6F after reading POE6F = 1 after
a high level input to POE6 is sampled at PÏ/8, PÏ/16,
or PÏ/128 clock (when low-level sampling is selected
by bits 5 and 4 in ICSR2)
[Setting condition]
13
POE5F
0
⢠When the input condition set by bits 5 and 4 in ICSR2
occurs at the POE6 pin
R/(W)*1 POE5 Flag
This flag indicates that a high impedance request has
been input to the POE5 pin.
[Clearing conditions]
⢠By writing 0 to POE5F after reading POE5F = 1
(when the falling edge is selected by bits 3 and 2 in
ICSR2)
⢠By writing 0 to POE5F after reading POE5F = 1 after
a high level input to POE5 is sampled at PÏ/8, PÏ/16,
or PÏ/128 clock (when low-level sampling is selected
by bits 3 and 2 in ICSR2)
[Setting condition]
⢠When the input condition set by bits 3 and 2 in ICSR2
occurs at the POE5 pin
Rev. 3.00 May 17, 2007 Page 690 of 1582
REJ09B0181-0300
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