SH7080 Datasheet, PDF (97/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 2 CPU
2.5 Instruction Set
2.5.1 Instruction Set by Type
Table 2.10 lists the instructions classified by type.
Table 2.10 Instruction Types
Type
Data transfer
instructions
Arithmetic
operation
instructions
Kinds of
Instruction
5
21
Op Code
MOV
MOVA
MOVT
SWAP
XTRCT
ADD
ADDC
ADDV
CMP/cond
DIV1
DIV0S
DIV0U
DMULS
DMULU
DT
EXTS
EXTU
MAC
MUL
Function
Number of
Instructions
Data transfer
39
Immediate data transfer
Peripheral module data transfer
Structure data transfer
Effective address transfer
T bit transfer
Upper/lower swap
Extraction of middle of linked registers
Binary addition
33
Binary addition with carry
Binary addition with overflow
Comparison
Division
Signed division initialization
Unsigned division initialization
Signed double-precision multiplication
Unsigned double-precision multiplication
Decrement and test
Sign extension
Zero extension
Multiply-and-accumulate, double-
precision multiply-and-accumulate
Double-precision multiplication
Rev. 3.00 May 17, 2007 Page 39 of 1582
REJ09B0181-0300