SH7080 Datasheet, PDF (1506/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 28 Electrical Characteristics
Tp
Tpw
Trr
Trc
Trc
Trc
CK
t_AD1
t_AD1
A25 to A0
t_AD1
t_AD1
A12/A11^*1
CSn
RDWR
RASx
CASx
t_CSD
t_CSD
t_CSD
t_CSD
t_RWD
t_RWD
t_RASD
t_RASD
t_RASD
t_RASD
t_CASD
t_CASD
t_RWD
DQMxx
D31 to D0
(Hi-Z)
BS
CKE
TDEANCDKnn^**22
(High)
Notes: 1. An address pin to be connected to pin A10 of SDRAM.
2. The waveform for DACKn and TENDn is when active low is specified.
Figure 28.38 Synchronous DRAM Auto-Refreshing Timing
(WTRP = 1 Cycle, WTRC = 3 Cycles)
Rev. 3.00 May 17, 2007 Page 1448 of 1582
REJ09B0181-0300