SH7080 Datasheet, PDF (357/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 9 Bus State Controller (BSC)
Ta1
Tadw
Ta2
Ta3
T1
T2
CK
A25 to A16
CSn
RDWR
AH
Read
RD
D15 to D0
Write
WRxx
D15 to D0
BS
DACKn*
Address
Address
Data
Data
Note: * The waveform for DACKn is when active low is specified.
Figure 9.12 Access Timing for MPX Space (Address Cycle Wait 1, Data Cycle No Wait)
Rev. 3.00 May 17, 2007 Page 299 of 1582
REJ09B0181-0300