SH7080 Datasheet, PDF (36/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Figure 11.107 Transfer Timing from Buffer Register to Temporary Register
(TCNTS Operating)............................................................................................. 616
Figure 11.108 Transfer Timing from Temporary Register to Compare Register ....................... 616
Figure 11.109 TGI Interrupt Timing (Compare Match) (Channels 0 to 4)................................. 617
Figure 11.110 TGI Interrupt Timing (Compare Match) (Channel 5) ......................................... 617
Figure 11.111 TGI Interrupt Timing (Input Capture) (Channels 0 to 4)..................................... 618
Figure 11.112 TGI Interrupt Timing (Input Capture) (Channel 5) ............................................. 618
Figure 11.113 TCIV Interrupt Setting Timing............................................................................ 619
Figure 11.114 TCIU Interrupt Setting Timing............................................................................ 619
Figure 11.115 Timing for Status Flag Clearing by CPU (Channels 0 to 4)................................ 620
Figure 11.116 Timing for Status Flag Clearing by CPU (Channel 5) ........................................ 620
Figure 11.117 Timing for Status Flag Clearing by DTC Activation (Channels 0 to 4) .............. 621
Figure 11.118 Timing for Status Flag Clearing by DTC Activation (Channel 5)....................... 621
Figure 11.119 Timing for Status Flag Clearing by DMAC Activation ...................................... 622
Figure 11.120 Phase Difference, Overlap, and Pulse Width in Phase Counting Mode .............. 623
Figure 11.121 Contention between TCNT Write and Clear Operations..................................... 624
Figure 11.122 Contention between TCNT Write and Increment Operations ............................. 625
Figure 11.123 Contention between TGR Write and Compare Match......................................... 626
Figure 11.124 Contention between Buffer Register Write and Compare Match........................ 627
Figure 11.125 Contention between Buffer Register Write and TCNT Clear.............................. 628
Figure 11.126 Contention between TGR Read and Input Capture (Channels 0 to 4)................. 629
Figure 11.127 Contention between TGR Read and Input Capture (Channel 5) ......................... 629
Figure 11.128 Contention between TGR Write and Input Capture (Channels 0 to 4)................ 630
Figure 11.129 Contention between TGR Write and Input Capture (Channel 5) ........................ 630
Figure 11.130 Contention between Buffer Register Write and Input Capture............................ 631
Figure 11.131 TCNT_2 Write and Overflow/Underflow Contention with Cascade
Connection .......................................................................................................... 632
Figure 11.132 Counter Value during Complementary PWM Mode Stop................................... 633
Figure 11.133 Buffer Operation and Compare-Match Flags in Reset Synchronous PWM
Mode.................................................................................................................... 634
Figure 11.134 Reset Synchronous PWM Mode Overflow Flag ................................................. 635
Figure 11.135 Contention between Overflow and Counter Clearing ......................................... 636
Figure 11.136 Contention between TCNT Write and Overflow................................................. 637
Figure 11.137 Error Occurrence in Normal Mode, Recovery in Normal Mode ......................... 642
Figure 11.138 Error Occurrence in Normal Mode, Recovery in PWM Mode 1......................... 643
Figure 11.139 Error Occurrence in Normal Mode, Recovery in PWM Mode 2......................... 644
Figure 11.140 Error Occurrence in Normal Mode, Recovery in Phase Counting Mode ............ 645
Figure 11.141 Error Occurrence in Normal Mode, Recovery in Complementary PWM
Mode.................................................................................................................... 646
Rev. 3.00 May 17, 2007 Page xxxvi of Iviii