SH7080 Datasheet, PDF (118/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 3 MCU Operating Modes
H'00000000
Modes 0 and 1
On-chip ROM disabled mode
H'00000000
Mode 2
On-chip ROM enabled mode
H'00000000
Mode 3
Single chip mode
CS0 space
H'03FFFFFF
H'04000000
H'07FFFFFF
H'08000000
H'0BFFFFFF
H'0C000000
H'0FFFFFFF
H'10000000
H'13FFFFFF
H'14000000
H'17FFFFFF
H'18000000
H'1BFFFFFF
H'1C000000
H'1FFFFFFF
H'20000000
CS1 space
CS2 space
CS3 space
CS4 space
CS5 space
CS6 space
CS7 space
On-chip ROM (256 kbytes)
On-chip ROM (256 kbytes)
H'0003FFFF
H'00040000
H'01FFFFFF
H'02000000
H'03FFFFFF
H'04000000
H'07FFFFFF
H'08000000
H'0BFFFFFF
H'0C000000
H'0FFFFFFF
H'10000000
H'13FFFFFF
H'14000000
H'17FFFFFF
H'18000000
H'1BFFFFFF
H'1C000000
H'1FFFFFFF
H'20000000
Reserved area
CS0 space
CS1 space
CS2 space
CS3 space
CS4 space
CS5 space
CS6 space
CS7 space
H'0003FFFF
H'00040000
Reserved area
Reserved area
Reserved area
H'FFF7FFFF
H'FFF80000
H'FFF9FFFF
H'FFFA0000
H'FFFF7FFF
H'FFFF8000
H'FFFFBFFF
H'FFFFC000
H'FFFFFFFF
SDRAM mode setting space
Reserved area
On-chip RAM (16 kbytes)
On-chip peripheral
I/O registers
H'FFF7FFFF
H'FFF80000
H'FFF9FFFF
H'FFFA0000
H'FFFF7FFF
H'FFFF8000
H'FFFFBFFF
H'FFFFC000
H'FFFFFFFF
SDRAM mode setting space
Reserved area
On-chip RAM (16 kbytes)
On-chip peripheral
I/O registers
H'FFFF7FFF
H'FFFF8000
H'FFFFBFFF
H'FFFFC000
H'FFFFFFFF
On-chip RAM (16 kbytes)
On-chip peripheral
I/O registers
Figure 3.3 Address Map for Each Operating Mode in SH7084
(256-Kbyte Flash Memory Version)
Rev. 3.00 May 17, 2007 Page 60 of 1582
REJ09B0181-0300