SH7080 Datasheet, PDF (1620/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Item
Page Revision (See Manual for Details)
21.1.2 Port A Control Registers L1 1041
to L4, H1 to H4 (PACRL1 to
to
PACRL4, PACRH1 to PACRH4) 1156
to 21.1.10 Port E Control
Registers L1 to L4, H1, H2
(PECRL1 to PECRL4, PECRH1,
PECRH2)
Note added.
Note: * This function is enabled only in the on-chip
ROM enabled/disabled external-extension
mode. Do not set 1 in single-chip mode.
21.1.3 Port B I/O Register L
(PBIORL)
1079 Deleted
….PBIORL is enabled when the port B pins are
functioning as general-purpose inputs/outputs (PB9 to
PB0), and the SCK pin is functioning as inputs/outputs
of SCI. In other states, PBIORL is disabled.
21.1.8 Port D Control Registers L1 1106, Deleted
to L4, H1 to H4 (PDCRL1 to
1107 _{Bit Bit Name}
PDCRL4, PDCRH1 to PDCRH4)
SH7083/SH7084:
5 PD13MD1
• Port D Control Register L4
4 PD13MD0
(PDCRL4)
Description
PD13 Mode
Select the function of the
PD13/D13/TIOC4BS/AUDMD pin. Fixed to
AUDMD output when using the AUD function of
the E10A.
1 PD12MD1 PD12 Mode
0 PD12MD0 Select the function of the
PD12/D12/TIOC4AS/AUDRST pin. Fixed to
AUDRST output when using the AUD function of
the E10A.
SH7085/SH7086:
• Port D Control Register H2
(PDCRH2)
1116 Deleted
Bit Bit Name Description
6 PD21MD2 PD21 Mode
5 PD21MD1 Select the function of the
4 PD21MD0 ^{PD21/D21/IRQ5/TIC5VS/AUDMD pin. Fixed to}
AUDMD output when using the AUD function of
the E10A.
2 PD20MD2 PD20 Mode
1 PD20MD1 Select the function of the
0 PD20MD0 ^{PD20/D20/IRQ4/TIC5WS/AUDRST pin. Fixed to}
AUDRST output when using the AUD function of
the E10A.
Rev. 3.00 May 17, 2007 Page 1562 of 1582
REJ09B0181-0300