SH7080 Datasheet, PDF (66/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 1 Overview
1.3 Pin Assignments
PE0/DREQ0/TIOC0A/TMS*³
PE1/TEND0/TIOC0B/TRST*³
PE2/DREQ1/TIOC0C/TDI*³
PE3/TEND1/TIOC0D/TDO*³
PE4/TIOC1A/RXD3/TCK*³
VSS
PF0/AN0
PF1/AN1
PF2/AN2
PF3/AN3
PF4/AN4
PF5/AN5
AVSS
PF6/AN6
PF7/AN7
AVref
AVCC
VSS
VCC
PE6/CS7/TIOC2A/SCK3
PE7/BS/TIOC2B/UBCTRG/RXD2/SSI
PE8/TIOC3A/SCK2/SSCK
PE10/TIOC3C/TXD2/SSO
PE12/TIOC4A/TXD3/SCS
PE13/TIOC4B/MRES/ASEBRKAK*³/ASEBRK*³
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
76
50
77
49
78
48
79
47
80
46
81
45
82
44
83
43
84
42
85
41
86
40
87
88
TQFP-100
(Top view)
39
38
89
37
90
36
91
35
92
34
93
33
94
32
95
31
96
30
97
29
98
28
99
27
100
26
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
PD9/D9/TIOC3BS/AUDATA1*⁴
PD10/D10/TIOC3CS/AUDATA2*⁴
PD11/D11/TIOC3DS/AUDATA3*⁴
PD12/D12/TIOC4AS
PD13/D13/TIOC4BS
PD14/D14/TIOC4CS/AUDCK*⁴
PD15/D15/TIOC4DS/AUDSYNC*⁴
PB6/A18/BACK/IRQ4/RXD0
PB7/A19/BREQ/IRQ5/TXD0
PB8/A20/WAIT/IRQ6/SCK0
PA3/A24/RXD1
PA4/A23/TXD1
PA5/A22/DREQ1/IRQ1/SCK1
PA7/CS3/TCLKB
PA8/RDWR/IRQ2/TCLKC
PA9/CKE/IRQ3/TCLKD
PA10/CS0/POE4
VSS
VCC
PA12/WRL/DQMLL/POE6
PA13/WRH/DQMLU/POE7
WDTOVF
PA14/RD
VCC (ASEMD0*²)
PB9/A21/IRQ7/ADTRG/POE8
Notes: 1. This pin is fixed to VSS in the mask ROM and ROM-less versions and is used as the FWE input pin in the F-ZTAT version.
2. This pin is for the E10A emulator. It is fixed to VCC in the mask ROM and ROM-less versions and is used as the ASEMD0 input pin
in the F-ZTAT version.
3. These pin functions are only available in the F-ZTAT version (i.e., they are not available in the mask ROM and ROM-less versions).
4. These pin functions are only available in the F-ZTAT version supporting full functions of E10A (not available in normal F-ZTAT version).
Figure 1.2 Pin Assignments of SH7083 (TQFP1414-100)
Rev. 3.00 May 17, 2007 Page 8 of 1582
REJ09B0181-0300