SH7080 Datasheet, PDF (883/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 16 Serial Communication Interface with FIFO (SCIF)
16.3.11 Serial Port Register (SCSPTR)
SCSPTR is a 16-bit register that controls input/output and data for the pins multiplexed to the
SCIF function. Bits 7 and 6 can control the RTS pin, bits 5 and 4 can control the CTS pin, and bits
3 and 2 can control the SCK pin. Bits 1 and 0 can be used to output data to the TXD pin, so they
control break of serial transfer. In addition to descriptions of individual bits shown below, see
section 16.6, Serial Port Register (SCSPTR) and SCIF Pins.
SCSPTR can always be read from or written to by the CPU. Note that the respective port registers
should be used to read the values on the SCIF pins. For details, refer to section 22, I/O Ports.
Bit: 15 14 13 12 11 10 9
-
-
-
-
-
-
-
Initial value: 0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
8
7
6
5
4
3
2
1
0
- RTSIO RTSDT CTSIO CTSDT SCKIO SCKDT SPBIO SPBDT
0
0
-
0
-
0
-
0
-
R R/W R/W R/W R/W R/W R/W R/W R/W
Bit
15 to 8
7
6
Initial
Bit Name value
R/W Description

All 0
R Reserved
These bits are always read as 0. The write value should
always be 0.
RTSIO 0
R/W RTS Port Input/Output Control
Controls the RTS pin in combination with the RTSDT bit
in this register and the MCE bit in SCFCR.
RTSDT
Undefined R/W
RTS Port Data
Controls the RTS pin in combination with the RTSIO bit
in this register and the MCE bit in SCFCR. Select the
RTS pin function in the PFC (pin function controller)
beforehand.
MCE RTSIO RTSDT: RTS pin state
00
×:
Setting prohibited (initial state)
01
0:
Low level output
01
1:
High level output
1×
×:
Sequence output according to
modem control logic
Note: ×: Don't care
Rev. 3.00 May 17, 2007 Page 825 of 1582
REJ09B0181-0300