SH7080 Datasheet, PDF (237/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 8 Data Transfer Controller (DTC)
8.2.6 DTC Transfer Count Register B (CRB)
CRB is a 16-bit register that designates the number of times data is to be transferred by the DTC in
block transfer mode. It functions as a 16-bit transfer counter (1 to 65,536) that is decremented by 1
every time a block of data is transferred, and bit DTCEn (n = 15 to 0) corresponding to the
activation source is cleared and then an interrupt is requested to the CPU when the count reaches
H'0000. The transfer count is 1 when CRB = H'0001, 65,535 when CRB = H'FFFF, and 65,536
when CRB = H'0000.
CRB is not available in normal and repeat modes and cannot be accessed directly by the CPU.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Initial value: *
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
R/W: -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
* : Undefined
Rev. 3.00 May 17, 2007 Page 179 of 1582
REJ09B0181-0300