SH7080 Datasheet, PDF (387/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 9 Bus State Controller (BSC)
CK
A25 to A0
A12/A11*¹
CSn
RASL, RASU
CASL, CASU
RDWR
DQMxx
D31 to D0
BS
DACKn*²
Tnop Tc1
Notes: 1. Address pin to be connected to pin A10 of SDRAM.
2. The waveform for DACKn is when active low is specified.
Figure 9.26 Single Write Timing (Bank Active, Same Row Address)
Rev. 3.00 May 17, 2007 Page 329 of 1582
REJ09B0181-0300