HD6417706 Datasheet, PDF (89/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Instruction
Operation
Code
STC R4_BANK,Rn R4_BANK→ Rn
0000nnnn11000010
STC R5_BANK,Rn R5_BANK→ Rn
0000nnnn11010010
STC R6_BANK,Rn R6_BANK→ Rn
0000nnnn11100010
STC R7_BANK,Rn R7_BANK→ Rn
0000nnnn11110010
STC.L SR,@–Rn
Rn–4 → Rn, SR → (Rn)
0100nnnn00000011
STC.L GBR,@–Rn Rn–4 → Rn, GBR → (Rn)
0100nnnn00010011
STC.L VBR,@–Rn Rn–4 → Rn, VBR → (Rn)
0100nnnn00100011
STC.L SSR,@–Rn Rn–4 → Rn, SSR → (Rn)
0100nnnn00110011
STC.L SPC,@–Rn Rn–4 → Rn, SPC → (Rn)
0100nnnn01000011
STC.L R0_BANK,
@–Rn
Rn–4 → Rn, R0_BANK → (Rn) 0100nnnn10000011
STC.L R1_BANK,
@–Rn
Rn–4 → Rn, R1_BANK → (Rn) 0100nnnn10010011
STC.L R2_BANK,
@–Rn
Rn–4 → Rn, R2_BANK → (Rn) 0100nnnn10100011
STC.L R3_BANK,
@–Rn
Rn–4 → Rn, R3_BANK → (Rn) 0100nnnn10110011
STC.L R4_BANK,
@–Rn
Rn–4 → Rn, R4_BANK → (Rn) 0100nnnn11000011
STC.L R5_BANK,
@–Rn
Rn–4 → Rn, R5_BANK → (Rn) 0100nnnn11010011
STC.L R6_BANK,
@–Rn
Rn–4 → Rn, R6_BANK → (Rn) 0100nnnn11100011
STC.L R7_BANK,
@–Rn
Rn–4 → Rn, R7_BANK → (Rn) 0100nnnn11110011
STS MACH,Rn
MACH → Rn
0000nnnn00001010
STS MACL,Rn
MACL → Rn
0000nnnn00011010
STS PR,Rn
PR → Rn
0000nnnn00101010
STS.L MACH,@–Rn Rn–4 → Rn, MACH → (Rn)
0100nnnn00000010
STS.L MACL,@–Rn Rn–4 → Rn, MACL → (Rn)
0100nnnn00010010
STS.L PR,@–Rn
Rn–4 → Rn, PR → (Rn)
0100nnnn00100010
TRAPA #imm
PC → SPC, SR → SSR,
imm → TRA
11000011iiiiiiii
Privileged
Mode
√
√
√
√
√
—
√
√
√
√
Cycles
1
1
1
1
2
2
2
2
2
2
T Bit
—
—
—
—
—
—
—
—
—
—
√
2
—
√
2
—
√
2
—
√
2
—
√
2
—
√
2
—
√
2
—
—
1
—
—
1
—
—
1
—
—
1
—
—
1
—
—
1
—
—
8
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Rev. 4.00, 03/04, page 43 of 660