 English |
|
|
|
|
|
|
|
| HD6417706 Datasheet, PDF (657/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series | |||
| |||
| ◁ |
Tpcm0 Tpcm1 Tpcm1w Tpcm1w Tpcm1w Tpcm2 Tpcm1 Tpcm1w Tpcm2 Tpcm2w
CKIO
tAD
A25 to A4
tAD
A3 to A0
tCSD1
+-NN
tRWD
RD/94
tRSD
4,
(read)
D15 to D0
(read)
*5
tBSD
tDAKD1
tBSD
tAD
tAD
tAD
tCSD1
tRWD
tRSD tRSD
tRSD
tRDS1
tRDH1
tRDS1
tRDH1
tBSD tBSD
tDAKD1
DACKn
9)16
tWTS tWTH
tWTS tWTH
tWTS tWTH
Note: Even though burst mode is set, the write cycle operation is the same as in normal mode.
Figure 24.43 PCMCIA Memory Bus Cycle
(Burst Read, TED = 1, TEH = 1, Two Waits, Burst Pitch = 3)
Rev. 4.00, 03/04, page 611 of 660
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese