HD6417706 Datasheet, PDF (182/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Access
Control
IAB LAB
Access
comparator
Address
comparator
ASID
comparator
Channel A
BBRA
BARA
BAMRA
BASRA
MDB
Access
comparator
Address
comparator
ASID
comparator
Data
comparator
Channel B
PC Trace
CONTROL
BBRB
BARB
BAMRB
BASRB
BDRB
BDMRB
BETR
BRSR
BRDR
BRCR
LDB/IDB
CPU state
signals
User break request
UBC Location
CCN Location
Legend
BBRA
BARA
BAMRA
BASRA
BBRB
BARB
BAMRB
: Break bus cycle register A
: Break address register A
: Break address mask register A
: Break ASID register A
: Break bus cycle register B
: Break address register B
: Break address mask register B
BASRB
BDRB
BDMRB
BETR
BRSR
BRDR
BRCR
: Break ASID register B
: Break data register B
: Break data mask register B
: Break execution times register
: Branch source register
: Branch destination register
: Break control register
Figure 7.1 Block Diagram of User Break Controller
Rev. 4.00, 03/04, page 136 of 660