HD6417706 Datasheet, PDF (340/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

10.2 Input/Output Pin
Table 10.1 lists the CPG pins and their functions.
Table 10.1 Clock Pulse Generator Pins and Functions
Pin Name
Mode control pins
Crystal I/O pins (clock
input pins)
Symbol
MD0
MD1
MD2
XTAL
EXTAL
Clock I/O pin
CKIO
Capacitor connection pins CAP1
for PLL
CAP2
I/O Description
I Set the clock operating mode.
I
I
O Connects a crystal oscillator.
I Connects a crystal oscillator. Also used to input an
external clock.
I/O Inputs or outputs an external clock.
I Connects capacitor for PLL circuit 1 operation
(recommended value 470 pF).
I Connects capacitor for PLL circuit 2 operation
(recommended value 470 pF).
10.3 Clock Operating Modes
Table 10.2 shows the relationship between the mode control pin (MD2 to MD0) combinations and
the clock operating modes. Table 10.3 shows the usable frequency ranges in the clock operating
modes and frequency ranges of the input clock (crystal oscillation). Operation cannot be
guaranteed if settings other than those listed in table 10.3 are used.
Table 10.2 Clock Operating Modes
Pin Values
Clock I/O
Mode MD2 MD1 MD0 Source Output
PLL2
On/Off
PLL1
On/Off
0
00
0
EXTAL CKIO
On,
On
multiplication ratio: 1
1
001
EXTAL CKIO
On,
On
multiplication ratio: 4
2
010
Crystal CKIO
oscillator
On,
On
multiplication ratio: 4
7
111
CKIO
–
Off
On
— Other than the
above
Reserved (setting disabled)
Divider 1
Input
Divider 2
Input
PLL1 output PLL1
PLL1 output PLL1
PLL1 output PLL1
PLL1 output PLL1
CKIO
Frequency
(EXTAL)
(EXTAL) ×
4
(Crystal) ×
4
(CKIO)
Rev. 4.00, 03/04, page 294 of 660