HD6417706 Datasheet, PDF (623/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

CKIO,
internal clock
V_CC
V_CC min
t_OSC1
Stable oscillation
t_RESPW
t_RESPS
Note: Oscillation settling time in clock mode 2.
Oscillation settling time becomes t_OSC1 = t_PLL1 (min. 100 µs) except in clock mode 2.
Figure 24.4 Power-On Oscillation Settling Time
CKIO,
internal
clock
Standby
RESETP,
RESETM
t_OSC2
Stable oscillation
t_RESPW/MW
t_RESPS/MS
Note: Oscillation settling time in the Clock-mode-2 and Oscillation-halt-mode
Figure 24.5 Oscillation Settling Time at Standby Return (Return by Reset)
CKIO,
internal
clock
Standby
t_OSC3
Stable oscillation
NMI
Note: Oscillation settling time in the Clock-mode-2 and Oscillation-halt-mode
Figure 24.6 Oscillation Settling Time at Standby Return (Return by NMI)
Rev. 4.00, 03/04, page 577 of 660