HD6417706 Datasheet, PDF (240/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Table 8.13 8-Bit External Device/Big Endian Access and Data Alignment
Data Bus
Operation
D31 to D23 to D15 to
WE3,
D24 D16 D8 D7 to D0 DQMUU
Byte access at 0
— — — Data
7 to 0
Byte access at 1
— — — Data
7 to 0
Byte access at 2
— — — Data
7 to 0
Byte access at 3
— — — Data 7 to
0
Word
1st time — — — Data
access at 0 at 0
15 to 8
2nd time — — — Data
at 1
7 to 0
Word
1st time — — — Data
access at 2 at 2
15 to 8
2nd time — — — Data
at 3
7 to 0
Longword 1st time — — — Data
access at 0 at 0
31 to 24
2nd time — — — Data
at 1
23 to 16
3rd time — — — Data
at 2
15 to 8
4th time — — — Data
at 3
7 to 0
Strobe Signals
WE2, WE1,
DQMUL DQMLU
WE0,
DQMLL
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Rev. 4.00, 03/04, page 194 of 660