HD6417706 Datasheet, PDF (435/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

14.4.3 Clock Synchronous Operation
In the clock synchronous mode, the SCI transmits and receives data in synchronization with clock
pulses. This mode is suitable for high-speed serial communication.
The SCI transmitter and receiver are independent, so full-duplex communication is possible while
sharing the same clock. The transmitter and receiver are also double buffered, so continuous
transmitting or receiving is possible by reading or writing data while transmitting or receiving is in
progress.
Figure 14.17 shows the general format in clock synchronous serial communication.
*
Synchroni-
zation clock
One unit of communication data (character or frame)
*
Serial data Don't care
LSB
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
MSB
Bit 7
Don't care
Note: * High except in continuous transmitting or receiving
Figure 14.17 Data Format in Clock Synchronous Communication
In clock synchronous serial communication, each data bit is output on the communication line
from one falling edge of the serial clock to the next. Data are guaranteed valid at the rising edge of
the serial clock. In each character, the serial data bits are transmitted in order from the LSB (first)
to the MSB (last). After output of the MSB, the communication line remains in the state of the
MSB. In the clock synchronous mode, the SCI transmits or receives data by synchronizing with
the rising edge of the serial clock.
Communication Format: The data length is fixed at eight bits. No parity bit or multiprocessor bit
can be added.
Rev. 4.00, 03/04, page 389 of 660