HD6417706 Datasheet, PDF (498/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Figure 16.7 shows an example of the operation for transmission.
1
Serial
data
Start
bit
0 D0
Data
Parity Stop Start
bit bit bit
D1
D ₇ 0/1 1 0 D ₀
Parity Stop
Data
bit bit
1
D1
D ₇ 0/1 1
Idling
(marking)
TDFE
TEND
TXI interrupt
request
Data written to
SCFTDR2 and TDFE
flag read as 1 then
cleared to 0 by TXI
interrupt handler
TXI interrupt
request
One frame
Figure 16.7 Example of Transmit Operation
(Example with 8-Bit Data, Parity, One Stop Bit)
4. When modem control is enabled, transmission can be stopped and restarted in accordance with
the CTS2 input value. When CTS2 is set to 1, if transmission is in progress, the line goes to
the mark state after transmission of one frame. When CTS2 is set to 0, the next transmit data
is output starting from the start bit.
Figure 16.8 shows an example of the operation when modem control is used.
Serial
data
TXD2
Start
bit
0 D0 D1
Parity Stop
bit bit
D ₇ 0/1
Start
bit
0 D0 D1
D ₇ 0/1
Rise this point
before a stop bit
Figure 16.8 Example of Operation Using Modem Control (CTS2)
Rev. 4.00, 03/04, page 452 of 660