HD6417706 Datasheet, PDF (282/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

When an I/O card interface access is made to a PCMCIA card in little-endian mode, dynamic
sizing of the I/O bus width is possible using the IOIS16 pin. When a 16-bit bus width is set for
area 5 or 6, if the IOIS16 signal is high during a word-size I/O bus cycle, the I/O port is
recognized as being 8 bits in width. In this case, a data access for only 8 bits is performed in the
I/O bus cycle being executed, followed automatically by a data access for the remaining 8 bits.
Figure 8.38 shows the basic timing for dynamic bus sizing.
In big-endian mode, the IOIS16 signal is not supported.
In big-endian mode, the IOIS16 signal should be fixed low.
CKIO
Tpci1
Tpci2
A25 to A0
RD/
(read)
D15 to D0
(read)
I
(write)
D15 to D0
(write)
Figure 8.36 Basic Timing for PCMCIA I/O Card Interface
Rev. 4.00, 03/04, page 236 of 660