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HD6417706 Datasheet, PDF (677/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
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Reset
Category
Pin
SCI/Smart card RxD0/SCPT[0]
without FIFO TxD0/SCPT[0]
SCK0/SCPT[1]
SCIF with FIFO RxD2/SCPT[2]
TxD2/SCPT[2]
SCK2/SCPT[3]
RTS2/SCPT[4]
CTS2/IRQ5/SCPT[5]
Port
AUDSYNC/PTF[4]
CE2B/PTD[7]
CE2A/PTD[6]
TDO/PTF[5]
Power-On Manual
Reset
Reset
Z
ZI*7
Z
ZO*7
V
ZP*3
Z
ZI*7
Z
ZO*7
V
ZP*3
V
OP*3
V*8
ZI*7
OV
OP*3
H
OP*3
H
OP*3
OV
OP*3
IOIS16/PTD[5]
I
I
AUDCK/PTG[4]
IV
I
ADTRG/PTG[5]
V*8
I
AUDATA[3:0]/PTF[3:0] IV
ASEBRKAK/PTF[6] OV
I
OP*3
ASEMD0
I
I
Analog
AN[1:0]/PTJ[1:0]
Z
ZI*7
AN[3:2]/DA[0:1]/
Z
ZI*7
PTJ[3:2]
Legend
I:
Input
O: Output
H: High-level output
L:
Low-level output
Z:
High impedance
P:
Input or output depending on register setting
K:
Input pin is high impedance, output pin holds the state
V:
I/O buffer off, pullup MOS on
Power-Down
Standby
Z
ZK*3
ZK*3
Z
ZK*3
ZK*3
ZK*3
Sleep
IZ*6
OZ*6
IOP*5
IZ*6
OZ*6
IOP*5
OP*3
I
I
OK*3
OP*3
ZH*11 K*3 OP*3
ZH*11 K*3 OP*3
OK*3
OP*3
Z
I
IZ
I
IZ
I
IZ
OP*3
I
OP*3
Z
I
Z
OZ*2
I
IO*9
Bus
Released
IZ*6
OZ*6
IOP*5
IZ*6
OZ*6
IOP*5
OP*3
I
OP*3
ZP*3
ZP*3
OP*3
I
I
I
I
OP*3
I
I
IO*9
Notes: 1.
2.
3.
4.
Depending on the clock mode (MD2 to MD0 setting)
0 when DA output is enabled: otheruise Z.
K or P when the port function is used.
K or P when the port function is used. Z or O when the port function is not used
depending on register setting.
Rev. 4.00, 03/04, page 631 of 660
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