HD6417706 Datasheet, PDF (474/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Bit
Bit Name Initial Value R/W Description
3
STOP
0
R/W Stop Bit Length
Selects one or two bits as the stop bit length.
In receiving, only the first stop bit is checked,
regardless of the STOP bit setting. If the second
stop bit is 1, it is treated as a stop bit, but if the
second stop bit is 0, it is treated as the start bit of
the next incoming character.
0: One stop bit.
Note: In transmitting, a single bit of 1 is added at
the end of each transmitted character.
1: Two stop bits.
Note:In transmitting, two bits of 1 are added at
the end of each transmitted character.
2
—
0
R Reserved
This bit is always read as 0. The write value should
always be 0.
1
CKS1
0
R/W Clock Select 1 and 0
0
CKS0
0
R/W These bits select the internal clock source of the
on-chip baud rate generator. Four clock sources
are available. Pφ, Pφ/4, Pφ/16 and Pφ/64. For
further information on the clock source, bit rate
register settings, and baud rate, see section 16.3.8,
Bit Rate Register 2 (SCBRR2).
00: Pφ
01: Pφ/4
10: Pφ/16
11: Pφ/64
Note: Pφ: Peripheral clock
Rev. 4.00, 03/04, page 428 of 660