HD6417706 Datasheet, PDF (319/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Address
Mode Transfer Category
Request
Mode
Bus Transfer Usable
Mode Size (bits) Channels
Single External device with DACK and External
external memory
B/C
8/16/32/128 0, 1
External device with DACK and External
memory-mapped external device
B/C
8/16/32/128 0, 1
B: Burst, C: Cycle steal
Notes: 1. External requests, auto requests and on-chip peripheral module requests are all
available. For on-chip peripheral module requests, however, SCIF, and A/D converter
cannot be specified as the transfer request source.
2. External requests, auto requests and on-chip peripheral module requests are all
available. When the SCIF, or A/D converter is also the transfer request source,
however, the transfer destination or transfer source must be the SCIF, or A/D
converter, respectively.
3. If the transfer request source is the SCIF, the cycle-steal mode is only available.
4. The access size permitted when the transfer destination or source is an on-chip
peripheral module register.
5. If the transfer request is an external request, channels 0 and 1 are only available.
6. If the transfer request source is the SDRAM, the transfer size should be set smaller
than the bus width.
Bus Mode and Channel Priority Order: When a given channel 1 is transferring in the burst
mode and there is a transfer request to a channel 0 with a higher priority, the transfer of channel 0
will begin immediately.
At this time, if the priority is set in the fixed mode (CH0 > CH1), the channel 1 transfer will
continue when the channel 0 transfer has completely finished, even if channel 0 is operating in the
cycle-steal mode or in the burst mode.
If the priority is set in the round-robin mode, channel 1 will begin operating again after channel 0
completes the transfer of one transfer unit, even if channel 0 is in the cycle-steal mode or in the
burst mode. The bus will then switch between the two in the order channel 1, channel 0, channel 1,
channel 0.
Rev. 4.00, 03/04, page 273 of 660