HD6417706 Datasheet, PDF (209/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

H'00000000
H'20000000
H'40000000
P0, U0
H'60000000
H'80000000
P1
H'A0000000
P2
H'C0000000
P3
H'E0000000
P4
Logical address space
Area 0 (CS0)
Internal I/O
Area 2 (CS2)
Area 3 (CS3)
Area 4 (CS4)
Area 5 (CS5)
Area 6 (CS6)
Reserved area
H'00000000
H'04000000
H'08000000
H'0C000000
H'10000000
H'14000000
H'18000000
Physical address space
Note:
For logical address spaces P0 and P3, when the memory management unit (MMU) is on, it can
optionally generate a physical address for the logical address. It can be applied when the MMU is
off and when the MMU is on and each physical address for the logical address is equal except for
upper three bits.
See table 8.2, for information on converting logical addresses into user-defined physical
addresses.
Figure 8.2 Corresponding to Logical Address Space and Physical Address Space
Table 8.2 Physical Address Space Map
Area Connectable Memory Physical Address
0
Ordinary memory*¹,
H'00000000 to H'03FFFFFF
burst ROM
H'00000000 + H'20000000 × n to
H'03FFFFFF + H'20000000 × n
1
Internal I/O registers*⁸ H'04000000 to H'07FFFFFF
H'04000000 + H'20000000 × n to
H'07FFFFFF + H'20000000 × n
2
Ordinary memory*¹,
H'08000000 to H'0BFFFFFF
synchronous DRAM
H'08000000 + H'20000000 × n to
H'0BFFFFFF + H'20000000 × n
3
Ordinary memory*¹,
H'0C000000 to H'0FFFFFFF
synchronous DRAM
H'0C000000 + H'20000000 × n to
H'0FFFFFFF + H'20000000 × n
4
Ordinary memory*¹
H'10000000 to H'13FFFFFF
H'10000000 + H'20000000 × n to
H'13FFFFFF + H'20000000 × n
Capacity
64 Mbytes
Shadow
64 Mbytes
Shadow
64 Mbytes
Shadow
64 Mbytes
Shadow
64 Mbytes
Shadow
Access Size
8, 16, 32*²
n: 1 to 6
8, 16, 32*³
n: 1 to 6
8, 16, 32*³ *⁴
n: 1 to 6
8, 16, 32*³ *⁵
n: 1 to 6
8, 16, 32*³
n: 1 to 6
Rev. 4.00, 03/04, page 163 of 660