HD6417706 Datasheet, PDF (38/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Section 18 I/O Ports
Figure 18.1 Port A ...................................................................................................................... 479
Figure 18.2 Port B ...................................................................................................................... 480
Figure 18.3 Port C ...................................................................................................................... 482
Figure 18.4 Port D ...................................................................................................................... 483
Figure 18.5 Port E....................................................................................................................... 485
Figure 18.6 Port F....................................................................................................................... 486
Figure 18.7 Port G ...................................................................................................................... 488
Figure 18.8 Port H ...................................................................................................................... 489
Figure 18.9 Port J........................................................................................................................ 491
Figure 18.10 SC Port .................................................................................................................. 493
Section 19 A/D Converter (ADC)
Figure 19.1 A/D Converter Block Diagram................................................................................ 496
Figure 19.2 A/D Data Register Access Operation (Reading H'AA40) ....................................... 502
Figure 19.3 Word Access Example ............................................................................................ 503
Figure 19.4 Longword Access Example..................................................................................... 503
Figure 19.5 Example of A/D Converter Operation (Single Mode, Channel 1 Selected) ............ 504
Figure 19.6 Example of A/D Converter Operation
(Multi Mode, Channels AN0 to AN2 Selected) ...................................................... 506
Figure 19.7 Example of A/D Converter Operation
(Scan Mode, Channels AN0 to AN2 Selected) ........................................................ 507
Figure 19.8 A/D Conversion Timing .......................................................................................... 508
Figure 19.9 External Trigger Input Timing ................................................................................ 509
Figure 19.10 Definitions of A/D Conversion Accuracy ............................................................. 510
Figure 19.11 Example of Analog Input Protection Circuit ......................................................... 511
Figure 19.12 Analog Input Pin Equivalent Circuit ..................................................................... 511
Section 20 D/A Converter (DAC)
Figure 20.1 D/A Converter Block Diagram................................................................................ 513
Figure 20.2 Example of D/A Converter Operation..................................................................... 516
Section 21 User Debugging Interface (H-UDI)
Figure 21.1 H-UDI Block Diagram ............................................................................................ 517
Figure 21.2 TAP Controller State Transitions ............................................................................ 525
Figure 21.3 H-UDI Reset............................................................................................................ 527
Section 22 Power-Down Modes
Figure 22.1 Canceling Software Standby Mode with STBCR.STBY ........................................ 537
Figure 22.2 Power-On Reset STATUS Output........................................................................... 540
Figure 22.3 Manual Reset STATUS Output............................................................................... 540
Figure 22.4 Software Standby to Interrupt STATUS Output ..................................................... 541
Figure 22.5 Software Standby to Power-On Reset STATUS Output ......................................... 541
Figure 22.6 Software Standby to Manual Reset STATUS Output ............................................. 542
Figure 22.7 Sleep to Interrupt STATUS Output ......................................................................... 542
Rev. 4.00, 03/04, page xxxviii of xlvi