HD6417706 Datasheet, PDF (561/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

20.3.2 D/A Control Register (DACR)
DACR is an 8-bit read/write register that controls the operation of the D/A converter.
Bit
Bit Name Initial Value R/W Description
7
DAOE1 0
6
DAOE0 0
5
DAE
0
4 to 0 —
All 1
Note: ×: Don’t care
R/W D/A Output Enable 1
Controls D/A conversion and analog output.
0: DA1 analog output is disabled
1: Channel-1 D/A conversion and DA1 analog output
are enabled
R/W D/A Output Enable 0
Controls D/A conversion and analog output.
0: DA0 analog output is disabled
1: Channel-0 D/A conversion and DA0 analog output
are enabled
R/W D/A Enable
Controls D/A conversion, together with bits DAOE0
and DAOE1. When the DAE bit is cleared to 0, D/A
conversion is controlled independently in channels 0
and 1. When this LSI enters standby mode while D/A
conversion is enabled, the D/A output is held and the
analog power-supply current is equivalent to that
during D/A conversion. To reduce the analog power-
supply current in standby mode, clear the DAOE0 and
DAOE1 bits and disable the D/A output.
00×: D/A conversion is disabled in channels 0 and 1
010: D/A conversion is enabled in channel 0
D/A conversion is disabled in channel 1
011: D/A conversion is enabled in channels 0 and 1
100: D/A conversion is disabled in channel 0
D/A conversion is enabled in channel 1
101: D/A conversion is enabled in channels 0 and 1
11×: D/A conversion is enabled in channels 0 and 1
When the DAE bit is set to 1, even if bits DAOE0 and
DAOE1 in DACR and the ADST bit in ADCSR are
cleared to 0, the same current is drawn from the
analog power supply as during A/D and D/A
conversion.
R Reserved
These bits are always read as 1. The write value
should always be 1.
Rev. 4.00, 03/04, page 515 of 660