HD6417706 Datasheet, PDF (356/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Pφ
TCLK
RTCCLK
TUNI0
Prescaler
Clock
controller
Ch. 0
Counter
controller
Interrupt
controller
Ch. 1
Counter
controller
TOCR
TSTR
TCR_0
TCNT_0
TCOR_0
Bus interface
TCR_1
TCNT_1
TUNI1
Interrupt
controller
Ch. 2
Counter
controller
TCOR_1
TCR_2
TCPR_2
TCNT_2
TUNI2
TICPI2
Legend
TOCR: Timer output control register
TSTR: Timer start register
TCR_n: _{Timer control register}
(n: 0, 1, 2)
Interrupt
controller
TCOR_2
TMU
TCNT_n: 32-bit timer counter
TCOR_n: 32-bit timer constant register
TCPR_2: _{32-bit input capture register}
Figure 12.1 TMU Block Diagram
Rev. 4.00, 03/04, page 310 of 660