HD6417706 Datasheet, PDF (666/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

RESETP
ASEMD0
t_ASEMDOS
t_ASEMDOH
Figure 24.58 ASEMD0 Input Timing
AUDCK
AUDATA
AUDSYNC
t_AUDD
t_AUSYD
t_AUDCYC
t_AUDD
Figure 24.59 AUD Timing
24.3.10 A/D Converter Timing
Table 24.10 A/D Converter Timing
Item
Symbol Min Typ Max Unit Figure
External trigger input pulse width
tTRGW
2
External trigger input start delay time
tTRGS
50
Input sampling time
(CKS = 0) tSPL
—
(CKS = 1)
—
—
—
—
—
129 —
65
—
tcyc 24.60
ns
tcyc 24.61
A/D conversion start delay time (CKS = 0) tD
17
—
28
tcyc
(CKS = 1)
10
—
17
A/D conversion time
(CKS = 0) tCONV
(CKS = 1)
514 —
259 —
525 tcyc
266
tcyc: Pφ cycle
Rev. 4.00, 03/04, page 620 of 660