HD6417706 Datasheet, PDF (172/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Bit
Bit Name Initial Value R/W Description
5
IRQ5R 0
R/W IRQ5 Interrupt Request
Indicates whether an interrupt request is input to the
IRQ5 pin. When edge detection mode is set for IRQ5,
an interrupt request is cleared by clearing the IRQ5R
bit.
0: An interrupt request is not input to IRQ5 pin
1: An interrupt request is input to IRQ5 pin
4
IRQ4R 0
R/W IRQ4 Interrupt Request
Indicates whether an interrupt request is input to the
IRQ4 pin. When edge detection mode is set for IRQ4,
an interrupt request is cleared by clearing the IRQ4R
bit.
0: An interrupt request is not input to IRQ4 pin
1: An interrupt request is input to IRQ4 pin
3
IRQ3R 0
R/W IRQ3 Interrupt Request
Indicates whether an interrupt request is input to the
IRQ3 pin. When edge detection mode is set for IRQ3,
an interrupt request is cleared by clearing the IRQ3R
bit.
0: An interrupt request is not input to IRQ3 pin
1: An interrupt request is input to IRQ3 pin
2
IRQ2R 0
R/W IRQ2 Interrupt Request
Indicates whether an interrupt request is input to the
IRQ2 pin. When edge detection mode is set for IRQ2,
an interrupt request is cleared by clearing the IRQ2R
bit.
0: An interrupt request is not input to IRQ2 pin
1: An interrupt request is input to IRQ2 pin
1
IRQ1R 0
R/W IRQ1 Interrupt Request
Indicates whether an interrupt request is input to the
IRQ1 pin. When edge detection mode is set for IRQ1,
an interrupt request is cleared by clearing the IRQ1R
bit.
0: An interrupt request is not input to IRQ1 pin
1: An interrupt request is input to IRQ1 pin
0
IRQ0R 0
R/W IRQ0 Interrupt Request (IRQ0R)
Indicates whether an interrupt request is input to the
IRQ0 pin. When edge detection mode is set for IRQ0,
an interrupt request is cleared by clearing the IRQ0R
bit.
0: An interrupt request is not input to IRQ0 pin
1: An interrupt request is input to IRQ0 pin
Rev. 4.00, 03/04, page 126 of 660