HD6417706 Datasheet, PDF (219/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Bit
Bit Name Initial Value R/W Description
11
A5SZ1 1
R/W Area 5 Bus Size Specification
10
A5SZ0 1
R/W Specify the bus sizes of physical space area 5.
• When port A/B is unused.
00: Reserved (Setting prohibited)
01: Byte (8-bit) size
10: Word (16-bit) size
11: Longword (32-bit) size
• When port A/B is used.
00: Reserved (Setting prohibited)
01: Byte (8-bit) size
10: Word (16-bit) size
11: Reserved (Setting prohibited)
9
A4SZ1 1
R/W Area 4 Bus Size Specification
8
A4SZ0 1
R/W Specify the bus sizes of physical space area 4.
• When port A/B is unused.
00: Reserved (Setting prohibited)
01: Byte (8-bit) size
10: Word (16-bit) size
11: Longword (32-bit) size
• When port A/B is used.
00: Reserved (Setting prohibited)
01: Byte (8-bit) size
10: Word (16-bit) size
11: Reserved (Setting prohibited)
7
A3SZ1 1
R/W Area 3 Bus Size Specification
6
A3SZ0 1
R/W Specify the bus sizes of physical space area 3.
• When port A/B is unused.
00: Reserved (Setting prohibited)
01: Byte (8-bit) size
10: Word (16-bit) size
11: Longword (32-bit) size
• When port A/B is used.
00: Reserved (Setting prohibited)
01: Byte (8-bit) size
10: Word (16-bit) size
11: Reserved (Setting prohibited)
Rev. 4.00, 03/04, page 173 of 660