HD6417706 Datasheet, PDF (393/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Section 14 Serial Communication Interface (SCI)
This LSI has an on-chip serial communication interface (SCI) that supports both asynchronous and
clock synchronous serial communication. It also has a multiprocessor communication function for
serial communication among two or more processors. A block diagram of SCI is shown in figure
14.1, and the I/O ports are shown in figures 14.2 to 14.4.
14.1 Feature
The SCI has the following features.
• Selectable from asynchronous or clock synchronous as the serial communications mode
• Asynchronous mode:
 Serial data communications are synched by start-stop in character units. The SCI can
communicate with a universal asynchronous receiver/transmitter (UART), an asynchronous
communication interface adapter (ACIA), or any other communications chip that employs
a standard asynchronous serial system. It can also communicate with two or more other
processors using the multiprocessor communication function. There are 12 selectable serial
data communication formats.
 Data length: Seven or eight bits
 Stop bit length: One or two bits
 Parity: Even, odd, or none
 Multiprocessor bit: 1 or 0
 Receive error detection: Parity, overrun, and framing errors
 Break detection: By reading the RxD0 pin level directly from the port Serial
communication port data register (SCPDR) when a framing error occurs
• Clock synchronous mode:
 Serial data communication is synchronized with a clock signal. The SCI can communicate
with other chips having a clock synchronous communication function. One serial data
communication format is available.
 Data length: Eight bits
 Receive error detection: Overrun errors
• Full duplex communication
The transmitting and receiving sections are independent, so the SCI can transmit and receive
simultaneously. Both sections use double buffering, so continuous data transfer is possible in
both the transmit and receive directions.
• On-chip baud rate generator with selectable bit rates
• Internal or external transmit/receive clock source
From either baud rate generator (internal) or SCK0 pin (external)
Rev. 4.00, 03/04, page 347 of 660