HD6417706 Datasheet, PDF (535/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Bit
Bit Name Initial Value R/W Description
7

*
R Reserved
6

*
R
5
PG5DT *
R Table 18.7 shows the function of PGDR.
4
PG4DT *
R
3
PG3DT *
R
2
PG2DT *
R
1
PG1DT *
R
0
PG0DT *
R
Note: * Undefined
Table 18.7 Read/Write Operation of the Port G Data Register (PGDR)
PGnMD1 PGnMD0 Pin State
Read
0
0
Other function Low level
1
Reserved

1
0
Input (Pull-up Pin state
MOS: on)
1
Input (Pull-up Pin state
MOS: off)
Write
Ignored (no affect on pin state)
Ignored (no affect on pin state)
Ignored (no affect on pin state)
Ignored (no affect on pin state)
(n = 0 to 5)
18.8 Port H
Port H is a 7-bit I/O and port with the pin configuration shown in figure 18.8. Each pin has an
input pull-up MOS, which is controlled by Port H Control Register (PHCR) in PFC.
Port H
PTH6 (I/O) /
(input)
PTH5 (I/O) /
(input)
PTH4 (I/O) / IRQ4 (input)
PTH3 (I/O) / IRQ3 (input) /
PTH2 (I/O) / IRQ2 (input) /
PTH1 (I/O) / IRQ1 (input) /
PTH0 (I/O) / IRQ0 (input) /
(input)
(input)
(input)
(input)
Figure 18.8 Port H
Rev. 4.00, 03/04, page 489 of 660