HD6417706 Datasheet, PDF (357/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

12.2 Input/Output Pin
Table 12.1 shows the pin configuration of the TMU.
Table 12.1 Pin Configuration
Channel
Pin I/O
Clock input/clock output TCLK I/O
Description
External clock input pin/input capture control input
pin/realtime clock (RTC) output pin
12.3 Register Description
The TMU has the following registers. Refer to section 23, List of Registers, for more details of the
addresses and access sizes.
• Timer output control register (TOCR)
• Timer start register (TSTR)
• Timer constant register 0 (TCOR_0)
• Timer counter 0 (TCNT_0)
• Timer control register 0 (TCR_0)
• Timer constant register 1 (TCOR_1)
• Timer counter 1 (TCNT_1)
• Timer control register 1 (TCR_1)
• Timer constant register 2 (TCOR_2)
• Timer counter 2 (TCNT_2)
• Timer control register 2 (TCR_2)
• Input capture register 2 (TCPR_2)
Rev. 4.00, 03/04, page 311 of 660