HD6417706 Datasheet, PDF (459/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Initialize
Clear TE and RE bits in SCSCR to 0
Clear SCSSR's FER/ERS,
PER and ORER flags to 0
Set SCSMR's O/ bit to parity,
set CKS1 and CKS0 bits to
the clock and set C/
Set SCSMR's SMIF, SDIR,
and SINV bits
Set value in SCBRR
Set SCSCR's CKE1 and CKE0 bits
to the clock and clear TIE, RIE,
TE, RE, MPIE, and TEIE bits to 0
Wait
Has a 1-bit
No
interval elapsed?
Yes
Set SCSCR's
TIE, RIE, TE, and RE bits
End
Figure 15.5 Initialization Flowchart (Example)
Serial Data Transmission: The processing procedures in the smart card mode differ from
ordinary SCI processing because data is retransmitted when an error signal is sampled during a
data transmission. An example of transmission processing flowchart is shown in figure 15.6.
1. Initialize the smart card interface mode as described in Initialization above.
2. Check that the FER/ERS bit in SCSSR is cleared to 0.
3. Repeat steps 2 and 3 until the TEND flag in SCSSR is set to 1.
4. Write the transmit data into SCTDR, clear the TDRE flag to 0 and start transmitting. The
TEND flag will be cleared to 0.
5. To transmit more data, return to step 2.
6. To end transmission, clear the TE bit to 0.
Rev. 4.00, 03/04, page 413 of 660