HD6417706 Datasheet, PDF (410/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

14.3.8 SC Port Control Register (SCPCR)
The SC port control register (SCPCR) controls the direction of I/O signals on the SCI and SCIF
pins. SCPCR settings are used to perform I/O direction control, enabling data written in SCPDR to
be output to the TxD0 pin, data read from the RxD0 pin to be input, and the breaking of serial
transmission/reception. It is also possible to read data on and write output data to the SCK0 pin.
The I/O controls on the SCI and SCIF pins are performed using bits 3 to 0, and bits 11 to 4 in
SCPCR, respectively.
Bit
Bit Name
15 to 12 
11
SCP5MD1
10
SCP5MD0
9
SCP4MD1
8
SCP4MD0
7
SCP3MD1
6
SCP3MD0
5
SCP2MD1
4
SCP2MD0
3
SCP1MD1
2
SCP1MD0
1
SCP0MD1
0
SCP0MD0
Initial Value R/W Description
All 0
R Reserved
These bits are always read as 0; only 0 should be
written here.
1
R/W See section 17.1.10, SC Port Control Register
0
R/W ^(SCPCR).
1
R/W
0
R/W
1
R/W
0
R/W
1
R/W
0
R/W
1
R/W Serial clock port I/O
0
R/W These bits specify serial port SCK0 pin I/O. When
the SCK0 pin is actually used as a port I/O pin, clear
the C/A bit of SCSMR and bits CKE1 and CKE0 of
SCSCR to 0.
00: SCP1DT bit value is not output to SCK0 pin.
01: SCP1DT bit value is output to SCK0 pin.
10: SCK0 pin value is read from SCP1DT bit.
11: SCK0 pin value is read from SCP1DT bit.
0
R/W Serial port break I/O
0
R/W These bits specify the serial port TxD0 pin output
condition. When the TxD0 pin is actually used as a
port output pin and outputs the value set with the
SCP0DT bit, clear the TE bit of SCSCR to 0.
00: SCP0DT bit value is not output to TxD0 pin.
01: SCP0DT bit value is output to TxD0 pin.
Rev. 4.00, 03/04, page 364 of 660