HD6417706 Datasheet, PDF (380/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

13.3.11 Hour Alarm Register (RHRAR)
The hour alarm register (RHRAR) is an 8-bit read/write register, and an alarm register
corresponding to the BCD-coded hour section counter RHRCNT of the RTC. When the ENB bit is
set to 1, a comparison with the RHRCNT value is performed. From among the
RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR registers, the counter and alarm
register comparison is performed only on those with ENB bits set to 1, and if each of those
coincide, an RTC alarm interrupt is generated.
The range of hour can be set is 00 to 23 (decimal). Errant operation will result if any other value is
set.
The ENB bit in RHRAR is initialized by a power-on reset. The remaining RHRAR fields are not
initialized by a power-on reset or manual reset, or in standby mode.
Bit
7
6
5, 4
3 to 0
Bit Name Initial Value R/W Description
ENB
0
R/W Hour Alarm Enable
0: No compared
1: Compared

0
R Always read as 0.


R/W Setting value for 10-unit of hour alarm in the BCD-code.
The range can be set from 0 to 2 (decimal).


R/W Setting value for 1-unit of hour alarm in the BCD-code.
The range can be set from 0 to 9 (decimal).
Rev. 4.00, 03/04, page 334 of 660