HD6417706 Datasheet, PDF (404/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Bit
Bit Name Initial Value R/W Description
1
CKE1
0
R/W Clock Enable 1 and 0
0
CKE0
0
R/W These bits select the SCI clock source and enable
or disable clock output from the SCK pin.
Depending on the combination of CKE1 and
CKE0, the SCK pin can be used for serial clock
output or serial clock input.
The CKE0 setting is valid only in the asynchronous
mode, and only when the SCI is internally clock
(CKE1 = 0). The CKE0 setting is ignored in the
clock synchronous mode, or when an external
clock source is selected (CKE1 = 1). Before
selecting the SCI operating mode in the serial
mode register (SCSMR), set CKE1 and CKE0. For
further details on selection of the SCI clock source,
see table 14.9.
• Asynchronous mode
00: Internal clock; SCK0 pin is used for input pin
(input signal is ignored).*¹
01: Internal clock; SCK0 pin is used for clock
output. *²
01: External clock; SCK0 pin is used for clock
input. *³
11: External clock; SCK0 pin is used for clock
input. *³
• Clock synchronous mode
00: Internal clock; SCK0 pin is used for
synchronous clock output.*¹
01: Internal clock; SCK0 pin is used for
synchronous clock output.
01: External clock; SCK0 pin is used for
synchronous clock input.
11: External clock; SCK0 pin is used for
synchronous clock input.
Notes: 1. Initial value
2. The output clock frequency is the same
as the bit rate.
3. The input clock frequency is 16 times the
bit rate.
Rev. 4.00, 03/04, page 358 of 660