HD6417706 Datasheet, PDF (527/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

18.2.1 Register Description
Port B has the following register. Refer to section 23, List of Registers, for more details of the
addresses and access size.
• Port B data register (PBDR)
18.2.2 Port B Data Register (PBDR)
Port B data register (PBDR) is an 8-bit read/write register that stores data for pins PTB7 to PTB0.
PB7DT to PB0DT bit corresponds to PTB7 to PTB0 pin. When the pin function is general output
port, if the port is read the value of the corresponding PBDR bit is returned directly. When the
function is general input port, if the port is read the corresponding pin level is read.
Bit
Bit Name Initial Value R/W Description
7
PB7DT 0
R/W Table 18.2 shows the function of PBDR.
6
PB6DT 0
R/W
5
PB5DT 0
R/W
4
PB4DT 0
R/W
3
PB3DT 0
R/W
2
PB2DT 0
R/W
1
PB1DT 0
R/W
0
PB0DT 0
R/W
Table 18.2 Read/Write Operation of the Port B Data Register (PBDR)
PBnMD1 PBnMD0 Pin State
Read
0
0
Other function PBDR value
1
1
0
1
Output
Input (Pull-up
MOS on)
Input (Pull-up
MOS off)
PBDR value
Pin state
Pin state
Write
Value is written to PBDR, but does not affect
pin state.
Write value is output from pin.
Value is written to PBDR, but does not affect
pin state.
Value is written to PBDR, but does not affect
pin state.
(n = 0 to 7)
Rev. 4.00, 03/04, page 481 of 660