HD6417706 Datasheet, PDF (552/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

ADST
ADF
Set*
A/D conversion
Clear*
Clear*
Channel 0 (AN0)
operating
Channel 1 (AN1)
operating
Channel 2 (AN2)
operating
Channel 3 (AN3)
operating
ADDRA
Waiting
A/D conversion 1
Waiting
Waiting
A/D conversion 2
Waiting
Waiting
A/D conversion 3
Waiting
Transfer
A/D conversion result 1
Waiting
ADDRB
A/D conversion result 2
ADDRC
A/D conversion result 3
ADDRD
Note: * Downward arrows (↓) indicate instruction executed by software.
Figure 19.6 Example of A/D Converter Operation (Multi Mode,
Channels AN0 to AN2 Selected)
19.6.3 Scan Mode (MULTI = 1, SCN = 1)
Scan mode is useful for monitoring analog inputs in a group of one or more channels. When the
ADST bit in the ADCSR is set to 1 by software or external trigger input, A/D conversion starts on
the first channel in the group (AN0 when CH2 = 0). When two or more channels are selected,
after conversion of the first channel ends, conversion of the second channel (AN1) starts
immediately. A/D conversion continues cyclically on the selected channels until the ADST bit is
cleared to 0. The conversion results are transferred for storage into the ADDRA to ADDRD
corresponding to the channels.
When the mode or analog input channel must be changed during analog conversion, to prevent
incorrect operation, first clear the ADST bit to 0 to halt A/D conversion. After making the
necessary changes, set the ADST bit to 1. A/D conversion will start again from the first channel in
the group. The ADST bit can be set at the same time as the mode or channel selection is changed.
Typical operations when three channels (AN0 to AN2) are selected in scan mode are described
next. Figure 19.7 shows a timing diagram for this example.
Rev. 4.00, 03/04, page 506 of 660