HD6417706 Datasheet, PDF (680/709 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Pin
CS2/PTC[3]
CS3/PTC[4]
CS4/PTC[5]
CS5/CE1A/PTC[6]
CS6/CE1B/PTC7]
CE2A/PTD[6]
CE2B/PTD[7]
RASL/PTD[0]
RASU/PTD[1]
CASL/PTD[2]
CASU/PTD[3]
CKE/PTD[4]
IOIS16/PTD[5]
BACK
BREQ
WAIT
DACK0/PTE[0]
DACK1/PTE[1]
DRAK0/PTE[2]
DRAK1/PTE[3]
AUDATA[0]/PTF[0]
AUDATA[1]/PTF[1]
AUDATA[2]/PTF[2]
AUDATA[3]/PTF[3]
AUDSYNC/PTF[4]
TDI/PTG[0]
TCK/PTG[1]
TMS/PTG[2]
TRST/PTG[3]
TDO/PTF[5]
Number of Pins
FP-176C TBP-208A I/O
Function
87
T14
O / I/O
Chip select 2 / input/output port C
88
R14
O / I/O
Chip select 3 / input/output port C
89
U17
O / I/O
Chip select 4 / input/output port C
90
T17
O / O / I/O Chip select 5 / CE1 (area 5 PCMCIA) / input/output port C
91
R15
O / O / I/O Chip select 6 / CE1 (area 6 PCMCIA) / input/output port C
92
R16
O / I/O
Area 5 PCMCIA CE2 / input/output port D
94
P15
O / I/O
Area 6 PCMCIA CE2 / input/output port D
96
P17
O / I/O
Lower 32 Mbytes address RAS (SDRAM) / input/output port D
97
N14
O / I/O
Upper 32 Mbytes address RAS (SDRAM) / input/output port D
98
N15
O / I/O
Lower 32 Mbytes address CAS (SDRAM) / input/output port D
99
N16
O / I/O
Upper 32 Mbytes address CAS (SDRAM) / input/output port D
100
N17
O / I/O
CK enable (SDRAM) / input/output port D
101
M14
I / I/O
IOIS16 (PCMCIA) / input port D
102
M15
O
Bus acknowledge
103
M16
I
Bus request
104
M17
I
Hardware wait request
105
L14
O / I/O
DMA acknowledge 0 / input/output port E
106
L15
O / I/O
DMA acknowledge 1 / input/output port E
107
L16
O / I/O
DMA request acknowledge / input/output port E
108
L17
O / I/O
DMA request acknowledge / input/output port E
109
K15
I/O
AUD data / input/output port F
110
K16
I/O
AUD data / input/output port F
111
K17
I/O
AUD data / input/output port F
112
J14
I/O
AUD data / input/output port F
113
J16
O / I/O
AUD synchronous / input/output port F
114
J17
I
Data input (H-UDI) / input port G
116
H17
I
Clock (H-UDI) / input port G
118
G16
I
Mode select (H-UDI) / input port G
119
G15
I
Reset (H-UDI) / input port G
120
G14
O / I/O
Data output (H-UDI) / input/output port F
Rev. 4.00, 03/04, page 634 of 660