SH7058 Datasheet, PDF (86/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

Table 2.10 Classification of Instructions (cont)
Operation
Classification Types Code
Logic
6
operations
AND
NOT
OR
TAS
TST
XOR
Shift
10 ROTL
ROTR
ROTCL
ROTCR
SHAL
SHAR
SHLL
SHLLn
SHLR
SHLRn
Branch
9
BF
BT
BRA
BRAF
BSR
BSRF
JMP
JSR
RTS
Function
Logical AND
Bit inversion
Logical OR
Memory test and bit set
Logical AND and T bit set
Exclusive OR
One-bit left rotation
One-bit right rotation
One-bit left rotation with T bit
One-bit right rotation with T bit
One-bit arithmetic left shift
One-bit arithmetic right shift
One-bit logical left shift
n-bit logical left shift
One-bit logical right shift
n-bit logical right shift
Conditional branch, conditional branch with
delay (Branch when T = 0)
Conditional branch, conditional branch with
delay (Branch when T = 1)
Unconditional branch
Unconditional branch
Branch to subroutine procedure
Branch to subroutine procedure
Unconditional branch
Branch to subroutine procedure
Return from subroutine procedure
No. of
Instructions
14
14
11
Rev. 3.0, 09/04, page 45 of 1086