SH7058 Datasheet, PDF (640/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

16.7.3 Message Transmission Sequence
(1) Event Triggered Transmission
• Message Transmission Request
Figure 16.8 is an example to transmit a CAN frame onto the bus. As described in Register
Description, note that IRR8 is set when the TXACK or ABACK bit is set. This means that one of
the mailboxes has completed its transmission or transmission abortion and is now ready to be
updated for the next transmission, whereas, GSR2 means that there is currently no transmission
request made (TXPR = H'0000).
HCAN is in normal mode
(MBC[x]=0x000 or 0x001)
Mailbox[x] is ready
to be updated for
next transmission
Update message data of
Mailbox[x]
Clear TXACK[x]
Write 1 to the TXPR[x] bit
at any desired timing
Internal arbitration
No
highest priority?
Yes
TXACK[x] =1?
Yes
IRR8 =1?
No
Reinterrupt
monitoring
No
Reinterrupt
monitoring
Transmission start
CAN bus
arbitration
End of Frame
CAN bus
Figure 16.8 Transmission Request
Rev. 3.0, 09/04, page 599 of 1086