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SH7058 Datasheet, PDF (816/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine | |||
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⢠Bit 8âPF4 Mode Bit (PF4MD): Selects the function of pin PF4/A20.
Bit 8:
PF4MD
0
1
Expanded Mode
with ROM Disabled
Address output (A20)
(Initial value)
Address output (A20)
Description
Expanded Mode
with ROM Enabled
General input/output (PF4)
(Initial value)
Address output (A20)
Single-Chip Mode
General input/output (PF4)
(Initial value)
General input/output (PF4)
⢠Bit 7âReserved: This bit is always read as 0. The write value should always be 0.
⢠Bit 6âPF3 Mode Bit (PF3MD): Selects the function of pin PF3/A19.
Bit 6:
PF3MD
0
1
Expanded Mode
with ROM Disabled
Address output (A19)
(Initial value)
Address output (A19)
Description
Expanded Mode
with ROM Enabled
General input/output (PF3)
(Initial value)
Address output (A19)
Single-Chip Mode
General input/output (PF3)
(Initial value)
General input/output (PF3)
⢠Bit 5âReserved: This bit is always read as 0. The write value should always be 0.
⢠Bit 4âPF2 Mode Bit (PF2MD): Selects the function of pin PF2/A18.
Bit 4:
PF2MD
0
1
Expanded Mode
with ROM Disabled
Address output (A18)
(Initial value)
Address output (A18)
Description
Expanded Mode
with ROM Enabled
General input/output (PF2)
(Initial value)
Address output (A18)
Single-Chip Mode
General input/output (PF2)
(Initial value)
General input/output (PF2)
⢠Bit 3âReserved: This bit is always read as 0. The write value should always be 0.
⢠Bit 2âPF1 Mode Bit (PF1MD): Selects the function of pin PF1/A17.
Bit 2:
PF1MD
0
1
Expanded Mode
with ROM Disabled
Address output (A17)
(Initial value)
Address output (A17)
Description
Expanded Mode
with ROM Enabled
General input/output (PF1)
(Initial value)
Address output (A17)
Single-Chip Mode
General input/output (PF1)
(Initial value)
General input/output (PF1)
⢠Bit 1âReserved: This bit is always read as 0. The write value should always be 0.
Rev. 3.0, 09/04, page 775 of 1086
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