SH7058 Datasheet, PDF (74/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

2.1.5 Floating-Point System Registers
There are two 32-bit floating-point system registers: the floating-point communication register
(FPUL) and the floating-point status/control register (FPSCR). FPUL is used for communication
between the CPU and the floating-point unit (FPU). FPSCR indicates and stores status/control
information relating to FPU exceptions.
These registers are incorporated into the floating-point unit (FPU). For details, see section 3,
Floating-Point Unit (FPU).
31
FPUL
31
FPSCR
0
FPUL: Floating-point communication register
Used for communication between
the CPU and the FPU.
0
FPSCR: Floating-point status/control register
Indicates and stores status/control
information relating to FPU exceptions.
Figure 2.5 Floating-Point System Registers
2.1.6 Initial Values of Registers
Table 2.1 lists the values of the registers after reset.
Table 2.1 Initial Values of Registers
Classification
General registers
Register
R0–R14
R15 (SP)
Control registers
SR
System registers
GBR
VBR
MACH, MACL, PR
PC
Floating-point registers
Floating-point system registers
FR0–FR15
FPUL
FPSCR
Initial Value
Undefined
Value of the stack pointer in the vector
address table
Bits I3–I0 are 1111 (H'F), reserved bits
are 0, and other bits are undefined
Undefined
H'00000000
Undefined
Value of the program counter in the
vector address table
Undefined
Undefined
H'00040001
Rev. 3.0, 09/04, page 33 of 1086