SH7058 Datasheet, PDF (542/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

Communication Formats: Four formats are available. Parity-bit settings are ignored when the
multiprocessor format is selected. For details see table 15.8.
Clock: See the description in the asynchronous mode section.
Transmitting
processor
Receiving
processor A
(ID = 01)
Serial communication line
Receiving
processor B
(ID = 02)
Receiving
processor C
(ID = 03)
Receiving
processor D
(ID = 04)
Serial
data
H'01
(MPB = 1)
H'AA
(MPB = 0)
ID-transmit cycle:
receiving processor address
MPB: Multiprocessor bit
Data-transmit cycle:
data sent to receiving
processor specified by ID
Figure 15.10 Communication among Processors Using Multiprocessor Format
(Example: Sending Data H'AA to Receiving Processor A)
Data Transmit/Receive Operation
Transmitting Multiprocessor Serial Data: Figure 15.11 shows a sample flowchart for
transmitting multiprocessor serial data. The procedure is as follows (the steps correspond to the
numbers in the flowchart):
Rev. 3.0, 09/04, page 501 of 1086