SH7058 Datasheet, PDF (30/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

11.4 Interrupts ........................................................................................................................... 388
11.4.1 Status Flag Setting Timing................................................................................... 388
11.4.2 Status Flag Clearing ............................................................................................. 393
11.5 CPU Interface.................................................................................................................... 395
11.5.1 Registers Requiring 32-Bit Access ...................................................................... 395
11.5.2 Registers Permitting 8-Bit, 16-Bit, or 32-Bit Access........................................... 397
11.5.3 Registers Requiring 16-Bit Access ...................................................................... 398
11.5.4 8-Bit or 16-Bit Accessible Registers.................................................................... 399
11.5.5 Registers Requiring 8-Bit Access ........................................................................ 400
11.6 Sample Setup Procedures.................................................................................................. 400
11.7 Usage Notes ...................................................................................................................... 412
11.8 ATU-II Registers and Pins ................................................................................................ 425
Section 12 Advanced Pulse Controller (APC)...................................................427
12.1 Overview........................................................................................................................... 427
12.1.1 Features................................................................................................................ 427
12.1.2 Block Diagram ..................................................................................................... 428
12.1.3 Pin Configuration................................................................................................. 429
12.1.4 Register Configuration......................................................................................... 429
12.2 Register Descriptions ........................................................................................................ 430
12.2.1 Pulse Output Port Control Register (POPCR)...................................................... 430
12.3 Operation .......................................................................................................................... 431
12.3.1 Overview.............................................................................................................. 431
12.3.2 Advanced Pulse Controller Output Operation ..................................................... 432
12.4 Usage Notes ...................................................................................................................... 435
Section 13 Watchdog Timer (WDT)..................................................................437
13.1 Overview........................................................................................................................... 437
13.1.1 Features................................................................................................................ 437
13.1.2 Block Diagram ..................................................................................................... 438
13.1.3 Pin Configuration................................................................................................. 438
13.1.4 Register Configuration......................................................................................... 439
13.2 Register Descriptions ........................................................................................................ 439
13.2.1 Timer Counter (TCNT)........................................................................................ 439
13.2.2 Timer Control/Status Register (TCSR) ................................................................ 440
13.2.3 Reset Control/Status Register (RSTCSR) ............................................................ 442
13.2.4 Register Access.................................................................................................... 443
13.3 Operation .......................................................................................................................... 444
13.3.1 Watchdog Timer Mode ........................................................................................ 444
13.3.2 Interval Timer Mode ............................................................................................ 446
13.3.3 Timing of Setting the Overflow Flag (OVF) ....................................................... 446
13.3.4 Timing of Setting the Watchdog Timer Overflow Flag (WOVF)........................ 447
13.4 Usage Notes ...................................................................................................................... 447
Rev. 3.0, 09/04, page xxvii of xxxviii