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SH7058 Datasheet, PDF (838/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine | |||
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21.3.24 Port L Control Registers H and L (PLCRH, PLCRL)
Port L control registers H and L (PLCRH, PLCRL) are 16-bit readable/writable registers that
select the functions of the 14 multiplex pins in port L. PLCRH selects the functions of the pins for
the upper 6 bits of port L, and PLCRL selects the functions of the pins for the lower 8 bits.
PLCRH and PLCRL are initialized to H'0000 by a power-on reset (excluding a WDT power-on
reset), and in hardware standby mode. They are not initialized in software standby mode or sleep
mode.
Port L Control Register H (PLCRH)
Bit: 15
14
13
12
11
10
9
8
â
â
â
â
PL13 PL13
â
PL12
MD1 MD0
MD
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R/W R/W
R
R/W
Bit: 7
6
5
4
3
2
1
0
PL11 PL11 PL10 PL10 PL9
PL9
â
PL8
MD1 MD0 MD1 MD0 MD1 MD0
MD
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W
R
R/W
⢠Bits 15 to 12âReserved: These bits are always read as 0. The write value should always be 0.
⢠Bits 11 and 10âPL13 Mode Bits 1 and 0 (PL13MD1, PL13MD0): These bits select the
function of pin PL13/IRQOUT.
Bit 11: PL13MD1
0
1
Bit 10: PL13MD0
0
1
0
1
Description
General input/output (PL13)
(Initial value)
IRQOUT is fixed high (IRQOUT)
IRQOUT is output by INTC interrupt request
(IRQOUT)
Reserved (Do not set)
⢠Bit 9âReserved: This bit is always read as 0. The write value should always be 0.
Rev. 3.0, 09/04, page 797 of 1086
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