SH7058 Datasheet, PDF (307/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

• Bit 3—Input Capture/Compare-Match Flag 2D (IMF2D): Status flag that indicates GR2D
input capture or compare-match.
Bit 3: IMF2D
0
1
Description
[Clearing condition]
(Initial value)
When IMF2D is read while set to 1, then 0 is written to IMF2D
[Setting conditions]
• When the TCNT2A value is transferred to GR2D by an input capture
signal while GR2D is functioning as an input capture register
• When TCNT2A = GR2D while GR2D is functioning as an output compare
register
• Bit 2—Input Capture/Compare-Match Flag 2C (IMF2C): Status flag that indicates GR2C input
capture or compare-match.
Bit 2: IMF2C
0
1
Description
[Clearing condition]
(Initial value)
When IMF2C is read while set to 1, then 0 is written to IMF2C
[Setting conditions]
• When the TCNT2A value is transferred to GR2C by an input capture
signal while GR2C is functioning as an input capture register
• When TCNT2A = GR2C while GR2C is functioning as an output compare
register
• Bit 1—Input Capture/Compare-Match Flag 2B (IMF2B): Status flag that indicates GR2B input
capture or compare-match.
Bit 1: IMF2B
0
1
Description
[Clearing condition]
(Initial value)
When IMF2B is read while set to 1, then 0 is written to IMF2B
[Setting conditions]
• When the TCNT2A value is transferred to GR2B by an input capture
signal while GR2B is functioning as an input capture register
• When TCNT2A = GR2B while GR2B is functioning as an output compare
register
Rev. 3.0, 09/04, page 266 of 1086