SH7058 Datasheet, PDF (470/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

12.1.3 Pin Configuration
Table 12.1 summarizes the advanced pulse controller’s output pins.
Table 12.1 Advanced Pulse Controller Pins
Pin Name
PULS0
PULS1
PULS2
PULS3
PULS4
PULS5
PULS6
PULS7
I/O
Output
Output
Output
Output
Output
Output
Output
Output
Function
APC pulse output 0
APC pulse output 1
APC pulse output 2
APC pulse output 3
APC pulse output 4
APC pulse output 5
APC pulse output 6
APC pulse output 7
12.1.4 Register Configuration
Table 12.2 summarizes the advanced pulse controller’s register.
Table 12.2 Advanced Pulse Controller Register
Name
Abbreviation R/W Initial Value Address
Access Size
Pulse output port control POPCR
register
R/W H'0000
H'FFFFF700 8, 16
Note: Register access with an internal clock multiplication ratio of 4 requires four or five internal
clock (φ) cycles.
Rev. 3.0, 09/04, page 429 of 1086