SH7058 Datasheet, PDF (699/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

• Bit 7—Reserved: This bit is always read as 0. The write value should always be 0.
• Bit 6—Trigger A/D Flag B (TADFxB): Indicates the end of multi-trigger A/D conversion B.
Bit 6: TADFxB
Description
0
Indicates that the multi-trigger A/D converter is performing A/D conversion B, or
the converter is in the idle state
(Initial value)
[Clearing condition]
When TADFxB is read while set to 1, then 0 is written to TADFxB
1
Indicates that the multi-trigger A/D converter has finished A/D conversion B, and
the digital value has been transferred to ADDR
[Setting condition]
When multi-trigger A/D conversion B ends
Note: x = 0 or 1.
• Bit 5—Trigger A/D Flag A (TADFxA): Indicates the end of multi-trigger A/D conversion A.
Bit 5: TADFxA
Description
0
Indicates that the multi-trigger A/D converter is performing A/D conversion A, or
the converter is in the idle state
(Initial value)
[Clearing condition]
When TADFxA is read while set to 1, then 0 is written to TADFxA
1
Indicates that the multi-trigger A/D converter has finished A/D conversion A, and
the digital value has been transferred to ADDR
[Setting condition]
When multi-trigger A/D conversion A ends
Note: x = 0 or 1.
• Bit 4—A/D Duty Flag B (ADDFxB): Indicates whether or not the ADDRxB and ADCNT
values have matched.
Bit 4:
ADDFxB
Description
0
[Clearing condition]
When ADDFxB is read while set to 1, then 0 is written to ADDFxB
1
[Setting condition]
When ADCNTx and ADDRxB values have matched
Note: x = 0 or 1.
(Initial value)
Rev. 3.0, 09/04, page 658 of 1086